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d a t a sh eet objective speci?cation file under integrated circuits, ic01 1997 jul 02 integrated circuits SAA2503 mpeg2 audio decoder
1997 jul 02 2 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 features single-chip mpeg2 multichannel audio decoder decodes mpeg high quality audio: C mpeg1 layer 2 (44.1 khz) C mpeg2 multichannel layer 2 (48 khz) C supports pause frames outputs 2 channels C quasi surround down-mixing for left and right dolby surround channel (lt and rt) C stereo down-mixing for stereo reproduction C stereo signal selection C single channel down-mixing karaoke modes linear pcm modes: C down-sampling from 96 to 48 khz C pass 48 khz signals bitstream input interface i 2 s-bus (iec 1937 formatted) iec 958 output interface (iec 1937 formatted) iec 958 output simultaneously available while decoding mpeg2 i 2 c-bus control output flags for direct control stand-alone operation possible (self-booting) no external dram or sram required on-chip pll for internal clock generation 13.5 or 27 mhz master clock 100 pins plastic lqfp package 5 v power supply. applications this ic is mainly intended for use in digital versatile disc (dvd) players. however it may also be used in any application that is able to accept an mpeg2 audio bitstreams such as: set top boxes multimedia pcs digital television next generation audio equipment. general description the SAA2503 incorporates all necessary functions, such as mpeg2 multichannel audio decoding plus down-mixing, mpeg1 layer 2 decoding, linear pcm (lpcm) processing all producing high quality audio. together with the serial audio interfaces and the iec 958 transmitter this allows for the complete audio function of a dvd player in a single chip. ordering information type number package name description version SAA2503ht lqfp100 plastic low pro?le quad ?at package; 100 leads; body 14 x 14 x 1.4 mm sot407-1
1997 jul 02 3 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 functional i/o diagram fig.1 functional i/o diagram. handbook, full pagewidth mgk396 i 2 c-bus serial host interface parallel host interface serial audio interface flags iec 958 transmitter ha2 ha0 h0 to h7 ha0 to ha2 sda slk hreq sdb sckr gpio0 to gpio3 wsr sckt busy wst sdi0 sdi1 sdo0 ado aci sdo1 sdo2 resrved (19) dsck/os1 modc once dso modb moda dr pll dsi/os0 plock pcap pinit extal mute i2cen horeq hack/pb14 hen hr/w reset interrupt reset SAA2503
1997 jul 02 4 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 pinning symbol pin i/o description n.c. 1 - not connected n.c. 2 - not connected gnda1 3 gnd ground 1 for some sections of internal logic n.c. 4 - not connected n.c. 5 - not connected h7/pb7 6 i/o not used h6/pb6 7 i/o not used gndh1 8 gnd isolated ground 1 for the hi i/o drivers hoa2/pb10 9 i/o not used v cch1 10 supply isolated power supply 1 for some sections of the internal chip logic hoa1/pb9 11 i/o not used hr/ w/pb11 12 i/o not used hen/pb12 13 i/o not used v ccq1 14 supply isolated power supply 1 for the hi i/o drivers gndq1 15 gnd isolated ground 1 for the internal logic hack/pb14 16 i/o not used gndh2 17 gnd isolated ground 2 for the hi i/o drivers hoa0/pb8 18 i/o not used h5/pb5 19 i/o not used v cch2 20 supply isolated power supply 2 for the hi i/o drivers h4/pb4 21 i/o not used h3/pb3 22 i/o not used gndh3 23 gnd isolated ground 3 for the hi i/o drivers h2/pb2 24 i/o not used h1/pb1 25 i/o not used h0/pb0 26 i/o not used horeq/pb13 27 i/o not used gndh4 28 gnd isolated ground 4 for the hi i/o drivers v cch3 29 supply isolated power supply 3 for the hi i/o drivers ado 30 o digital audio data output aci 31 i audio clock input n.c. 32 - not connected n.c. 33 - not connected n.c. 34 - not connected plock 35 o high when pll is phase locked v ccq2 36 supply isolated power supply 2 for some sections of the internal chip logic gndq2 37 gnd isolated ground 2 for the internal logic pinit 38 i pll enable/disable control gndp 39 gnd ground dedicated for the pll pcap 40 i pll capacitor input
1997 jul 02 5 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 v ccp 41 supply supply voltage for the phase locked loop (pll) extal 42 i external clock/crystal input scl 43 i i 2 c-bus serial clock gnds1 44 gnd isolated ground 1 for the shi i/o drivers sda 45 i/o i 2 c-bus data and acknowledge reset 46 i hardware reset for the microcontroller moda 47 i mode select a modb 48 i mode select b modc 49 i mode select c v ccs1 50 supply isolated power supply 1 for the shi i/o drivers ha0 51 i/o i 2 c-bus slave address 0 ha2 52 i i 2 c-bus slave address 2 hreq 53 i host request gnds2 54 gnd isolated ground 2 for the shi i/o drivers sdo2 55 o not used sdo1 56 o not used sdo0 57 o serial data output 0 v ccs2 58 supply isolated power supply 2 for the shi i/o drivers sckt 59 o transmit serial clock wst 60 o transmit word select sckr 61 i receive serial clock gndq3 62 gnd ground 3 dedicated for the pll v ccq3 63 supply isolated power supply 3 for some sections of the internal chip logic gnds3 64 gnd isolated ground 3 for the shi i/o drivers wsr 65 i receive word select sdi1 66 i serial data input 1 sdi0 67 i not used dso 68 o not used dsi/os0 69 o not used dsck/os1 70 o not used n.c. 71 - not connected n.c. 72 - not connected n.c. 73 - not connected n.c. 74 - not connected dr 75 i not used sdb 76 i/o general purpose i/o mute 77 i/o general purpose i/o gndd1 78 gnd ground 1 for some sections of internal logic busy 79 i/o general purpose i/o i2cen 80 i/o general purpose i/o v ccd1 81 supply isolated power supply 1 for some sections of the internal chip logic symbol pin i/o description
1997 jul 02 6 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 gpio3 82 i/o not used gpio2 83 i/o not used gndd2 84 gnd ground 2 for some sections of internal logic gpio1 85 i/o not used gpio0 86 i/o not used gndq4 87 gnd ground 4 for some sections of internal logic v ccq4 88 supply isolated power supply 4 for some sections of the internal chip logic n.c. 89 - not connected n.c. 90 - not connected gnda2 91 gnd ground 2 for some sections of internal logic n.c. 92 - not connected v cca1 93 supply isolated power supply 1 for some sections of the internal chip logic n.c. 94 - not connected n.c. 95 - not connected gnda3 96 gnd ground 3 for some sections of internal logic n.c. 97 - not connected n.c. 98 - not connected n.c. 99 - not connected v cca2 100 supply isolated power supply 2 for some sections of the internal chip logic symbol pin i/o description
1997 jul 02 7 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 fig.2 pin configuration. handbook, full pagewidth 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 80 79 78 77 76 busy gndd1 sdb n.c n.c n.c n.c dsck/os1 dsi/os0 dso sdi0 sdi1 wsr gnds3 v ccq3 gndq3 sckr wst sckt v ccs2 sdo0 sdo1 sdo2 gnds2 hreq ha2 ha0 mgk395 n.c. n.c. gnda1 n.c n.c h7/pb7 h6/pb6 gndh1 hoa2/pb10 v cch1 hoa1/pb9 v ccq1 gndq1 gndh2 hoa0/pb8 h5/pb5 v cch2 h4/pb4 h3/pb3 gndh3 h2/pb2 h1/pb1 aci n.c. n.c n.c plock v ccq2 gndq2 pinit gndp pcap v ccp extal scl gnds1 sda moda modb modc v ccs1 v cca2 n.c n.c n.c gnda3 n.c n.c v cca1 n.c gnda2 n.c n.c v ccq4 gndq4 gpio0 gpio1 gndd2 gpio2 gpio3 v ccd1 h0/pb0 gndh4 v cch3 ado 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 SAA2503 hr/w/pb11 hen/pb12 horeq/pb13 hack/pb14 reset dr mute i2cen
1997 jul 02 8 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 functional description operating modes the SAA2503 can operate in 2 modes. stand-alone (mode 4) in this mode (modc = 1, modb = 0 and moda = 0) the SAA2503 boots itself from the internal program rom after power-up and can start decoding when a decoding mode has been selected via the i 2 c-bus. booting via the i 2 c-bus (mode 7) in this mode (modc = 1, modb = 1 and moda = 1) the SAA2503 starts executing an internal boot program that will receive 1536 bytes via the i 2 c-bus and then write those to an on-chip program ram. this mode allows the standard behaviour (i/o interfaces, additional processing) to be modified as specified in the stand-alone mode. decoding modes the SAA2503 has the following decoding modes: mpeg decoding (48 khz dvd; 44.1 khz vcd) iec 958 lpcm mpeg decoding (48 khz dvd; 44.1 khz vcd) iec 958 bitstr lpcm cd-da (44.1 khz) lpcm down-sampling dvd (96 khz: 4 channel input; 48 khz 2 channel output) lpcm dvd (48 khz: 8 channel input; 2 channel output). system clock the preferred system clock to be applied to the extal pin of the SAA2503 is 27 mhz if booted in mode 4 (stand-alone operation). the internal pll multiplies this clock by a factor of 3 to obtain an 81 mhz internal clock. if using another external clock frequency it is advisable to ensure that: the internal pll is disabled during booting when f clk(ext) > 27 mhz that 10 mhz < (f clk(ext) 3) < 81 mhz. interfacing to the a/v splitter serial audio interface the serial audio interface can be configured as an i 2 s-bus interface and when required, as quad i 2 s interface. the signal received via the i 2 s-bus is an encoded audio bitstream in accordance with iec 1937, or lpcm. table 1 pinning of the i 2 s-bus interface notes 1. sckt is equal to sckr when the i 2 s-bus format is the format of the input signal. when quad i 2 s-bus is used sckt = 1 4 sckr. 2. the maximum allowed clock frequency for sck is 1 3 f clk (f clk is the internal clock generated by the pll of the SAA2503). pins description pin number direction sdi0 high impedance 67 not used sdi1 serial data 66 input/output sdo0 serial data 57 output sdo1 serial data 56 not used sdo2 serial data 55 not used sckr i 2 s-bus clock; notes 1 and 2 61 input wsr word select receive 65 input sdb serial data begin 76 input sckt i 2 s-bus clock; notes 1 and 2 59 input wst word select transmit 60 input
1997 jul 02 9 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 mpeg2 bitstreams the mpeg2 audio bitstream is received via the i 2 s-bus in the same format as specified in iec 1937. the mpeg2 audio bitstream consists of data bursts of 1 frame. the data is formatted in 16-bit chunks. the time period until the next frame is filled with logic 0. the serial data is received by the SAA2503 via the sdi1 pin (pin 66). for more information on transporting mpeg2 bitstreams via iec 958 see iec 1937. linear pcm (lpcm) i 2 s- bus linear pcm samples are received in an i 2 s-bus format. serial audio data is received via sdi1 (pin 66). the i 2 s-bus clock is received via sckr (pin 61) and the i 2 s-bus word select is received via wsr (pin 65); the i 2 s-bus clock operates at 64f s . q uad i 2 s- bus quad i 2 s-bus is the interface providing audio samples in lpcm with 4 times the sampling frequency. the interface is an extension of the i 2 s-bus where the serial data begin (sdb) indicates the first 2 channels out of 8 channels. the audio samples are transferred with msb first, where each sample occupies 32 bits, filled with logic 0. the sdb remains high when only 2 channels lpcm or encode bitstreams (in accordance with iec 1937) are transferred (quad i 2 s-bus is equal to i 2 s-bus). fig.3 quad i 2 s-bus frame format. handbook, full pagewidth mgk398 q0 q1 q2 q3 q4 q5 q6 q7 sd ws sdb sck 1 2 s-bus clock/quad 1 2 s-bus clock 1 sampling period
1997 jul 02 10 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 table 2 allocation of lpcm channels on quad i 2 s-bus, f s =48or96khz number of lpcm channels f s (khz) input ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 1 48 q0 mute mute mute mute mute mute mute 2 48 q0 q1 mute mute mute mute mute mute 3 48 q0 q1 q2 mute mute mute mute mute 4 48 q0 q1 q2 q3 mute mute mute mute 5 48 q0 q1 q2 q3 q4 mute mute mute 6 48 q0 q1 q2 q3 q4 q5 mute mute 7 48 q0 q1 q2 q3 q4 q5 q6 mute 8 48 q0q1q2q3q4q5q6q7 1 96 q0 mute mute mute q0 mute mute mute 2 96 q0 q1 mute mute q0 q1 mute mute 3 96 q0 q1 q2 mute q0 q1 q2 mute 4 96 q0q1q2q3q0q1q2q3 fig.4 quad i 2 s-bus channel format. handbook, full pagewidth sd ws sdb sck channel 0, 2, 4 or 6 channel n + 1 channel 1, 3, 5 or 7 channel n 0031 mgk397 31
1997 jul 02 11 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 audio outputs interfacing also see chapter interfacing to the a/v splitter. stereo output for dac the output stereo down-mixing signal is in i 2 s-bus format and can be directly connected to a dac. the sdo0 (pin 57) provides the output for the serial audio data. furthermore, sckt (pin 59) provides the i 2 s-bus clock and wst (pin 60), the i 2 s-bus word select. iec 958 transmitter the format of the iec 958 interface consists of a sequence of iec 958 sub frames. each iec 958 sub frame is normally used to carry one lpcm sample. the iec 958 sub frame may also be used to convey data words. the non-pcm encoded audio bitstreams to be transferred are formed into data bursts. these bitstreams consist of a sequence of data words. each data burst contains a 64-bit burst_preamble, followed by the burst_payload. the burst_preamble provides a sync_word, information on the burst_payload and the bitstream number. the interface may convey one or more bitstreams. each type of bitstream may impose a particular requirement for the repetition time for the data bursts that make up the bitstream. the 16-bit data words of a data burst are placed in time slots 12 to 27 of an iec 958 sub frame. in the consumer application, both odd and even iec 958-sub frames (ch1 and ch2) are simultaneously used to carry 32-bit data words (32-bit mode). this allows the consumer iec 958 to convey either 2-channel lpcm audio, or a set of alternating data words, but not both simultaneously. for more information see iec 1937. the iec 958 interface is of the digital audio interface. this conveys lpcm or encoded audio bitstreams according to iec 1937 (iec 1937), using the network layer of iec 958 (iec 958). the audio data will be accompanied by a validity bit, channel status and user data (sub code). table 3 pinning of iec 958 interface note 1. the aci clock is 256f s (or 512 or 384f s ). pins description pin number direction ado audio data output 30 output aci audio clock input; note 1 31 input interfacing with the microcontroller flags the SAA2503 has 3 flags which, after a hardware reset, are all initialized to logic 1. 1. i 2 c-bus communication disabled (pin 80); i2cen : this flag is set to logic 0 when the SAA2503 is ready to accept messages via the i 2 c-bus. 2. life test (pin 79); busy: when the SAA2503 operates in the mpeg decoding mode, this flag toggles whenever the SAA2503 has detected a synchronization pattern. the flag will then produce a 20.833 hz (f as = 48 khz) and a 19.140 hz (f as = 44.1 khz) signal. it can be used to monitor the mpeg decoding process. when this flag no longer toggles there is an error. when the SAA2503 operates in one of the lpcm modes however, the flag produces either a 23.437 hz (f as = 48 khz) or a 21.533 hz (f as = 44.1 khz) signal. 3. mpeg decoding active and synchronised (pin 77); mute: when the SAA2503 operates in the mpeg decoding mode, this flag indicates the state of the SAA2503 (synchronized or not). when this pin is at logic 1 the SAA2503 is out of sync, when set to logic 0 the SAA2503 is synchronized. it will not change state when the SAA2503 remains synchronized. when the SAA2503 is operating in one of the lpcm modes, the mute pin is set at logic 1 during initialization and logic 0 during processing. i 2 c-bus interface the i 2 c-bus interface supports data rates of up to 400 kbits/s. for a description of the i 2 c-bus see the i 2 c-bus and how to use it , ordering number 9398 393 40011. for a description of the i 2 c-bus commands controlling the SAA2503 see table 1.
1997 jul 02 12 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 application schematic fig.5 application diagram (continued in fig.6). handbook, full pagewidth mgk399 power gnd v cca1 41 26 25 24 22 21 19 7 6 18 11 9 12 13 27 86 16 85 83 82 80 79 77 76 39 gndp gnda1 gnda2 gnda3 gndd1 gndd2 gndh1 gndh2 gndh3 gndh4 gndq1 gndq2 gndq3 gndq4 gnds1 n.c. gnds2 extal pinit pcap plock dr dso dsi/os0 dsck/os1 sdo2 sdo1 sdo0 sckt wst sdi1 sdi0 sckr wsr aci ado ha0 ha2 sda scl hreq moda modb modc reset 3 91 96 78 84 8 17 23 28 15 37 62 87 44 4 51 52 45 43 53 47 48 49 46 h0/pb0 h1/pb1 h2/pb2 h3/pb3 h4/pb4 h5/pb5 h6/pb6 h7/pb7 hoa0/pb8 hoa1/pb9 hoa2/pb10 hr/w/pb11 hen/pb12 horeq/pb13 gpio0 jp37 10 k w 10 k w 10 k w 10 k w 10 k w 10 k w r140 r138 r136 reset scl sda jp 1 2 3 header 3 i 2 c-bus control i 2 c-bus address settings r139 r137 10 k w r134 r135 jp38 jumper jumper jumper jumper jumper jumper jumper jumper jumper jumper jp39 jp40 jp42 jp43 jp44 34 jp45 jp46 mode settings mute u11b 74hc04 jp41 hack/pb14 gpio1 gpio2 gpio3 i2cen busy mute sdb i2cen busy mute sdb 93 100 81 10 20 29 14 36 63 88 50 58 c73 c74 c75 c76 100 nf 100 nf 100 nf 100 nf l14 v ss reset v ccp v ccd1 v cca2 v cch1 v cch2 v cch3 v ccq1 v ccq2 v ccq3 v ccq4 v ccs1 v ccs2 54 42 38 40 35 75 68 69 70 31 30 iec 958 out (ebu) 55 56 57 59 60 66 67 61 65 sd-in sck-in ws-in SAA2503 a b c d e f g h i j k
1997 jul 02 13 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 fig.6 application diagram (continued from fig.5). handbook, full pagewidth mgk400 47 k w 47 k w 4.7 k w 10 k w 47 m f 10 m f 10 m f 47 m f 12 d/a-clk sysclk1 sws sck data-l-r emp1 emp2 mute v cc v cc bck u11a 74hc04 5 4 2 c78 1.2 nf d8 r142 r141 470 w led sdb j2 bnc 1 12 header 4 jp serial audio data from a/v splitter 34 jp50 jumper 16 14 15 7 8 ws 6 data 17 deem1 tda1305 18 deem2 21 atsb 20 dsmb v cc v cc v cc v cc 3 11 test1 test2 13 10 dr out c32 100 nf r143 c79 100 nf 74hc04 decoupling 9 4 5 8 l7 blm21a10 12 n.c. 19 22 r c 1 nf via op-amp to analog output 23 25 24 26 28 v cc 27 musb vol filtcl vor v ref v sso v ddo v ddd v ssd v dda v ssa sysclk0 n.c. v ssd clks1 clks2 filtcr gnd r110 100e v cc c c 1 nf c 100 nf 100 nf 100 nf c c c 100 nf u54 27 mhz osc c c a b c d e f g h i j k
1997 jul 02 14 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 package outline unit a max. a 1 a 2 a 3 b p ce (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 1.6 0.20 0.05 1.5 1.3 0.25 0.28 0.16 0.18 0.12 14.1 13.9 0.5 16.25 15.75 0.70 0.57 1.15 0.85 7 0 o o 0.12 0.1 0.2 1.0 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.75 0.45 sot407-1 95-12-19 d (1) (1) (1) 14.1 13.9 h d 16.25 15.75 e z 1.15 0.85 d b p e q e a 1 a l p q detail x l (a ) 3 b 25 c d h b p e h a 2 v m b d z d a z e e v m a x 1 100 76 75 51 50 26 y pin 1 index w m w m 0 5 10 mm scale lqfp100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm sot407-1
1997 jul 02 15 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). re?ow soldering reflow soldering techniques are suitable for all lqfp packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. wave soldering wave soldering is not recommended for lqfp packages. this is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. if wave soldering cannot be avoided, the following conditions must be observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. even with these conditions, do not consider wave soldering lqfp packages lqfp48 (sot313-2), lqfp64 (sot314-2) or lqfp80 (sot315-1). during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. repairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1997 jul 02 16 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. purchase of philips i 2 c components data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
1997 jul 02 17 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 notes
1997 jul 02 18 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 notes
1997 jul 02 19 philips semiconductors objective speci?cation mpeg2 audio decoder SAA2503 notes
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1997 sca54 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 1231, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: rua do rocio 220, 5th floor, suite 51, 04552-903 s?o paulo, s?o paulo - sp, brazil, tel. +55 11 821 2333, fax. +55 11 829 1849 spain: balmes 22, 08007 barcelona, tel. +34 3 301 6312, fax. +34 3 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 632 2000, fax. +46 8 632 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2686, fax. +41 1 481 7730 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2865, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 625 344, fax.+381 11 635 777 for all other countries apply to: philips semiconductors, marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 200 733, fax. +375 172 200 773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 689 211, fax. +359 2 689 102 canada: philips semiconductors/components, tel. +1 800 234 7381 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. +45 32 88 2636, fax. +45 31 57 0044 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615800, fax. +358 9 61580920 france: 4 rue du port-aux-vins, bp317, 92156 suresnes cedex, tel. +33 1 40 99 6161, fax. +33 1 40 99 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 23 53 60, fax. +49 40 23 536 300 greece: no. 15, 25th march street, gr 17778 tavros/athens, tel. +30 1 4894 339/239, fax. +30 1 4814 240 hungary: see austria india: philips india ltd, shivsagar estate, a block, dr. annie besant rd. worli, mumbai 400 018, tel. +91 22 4938 541, fax. +91 22 4938 722 indonesia: see singapore ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381 middle east: see italy printed in the netherlands 547027/1200/01/pp20 date of release: 1997 jul 02 document order number: 9397 750 01802

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